1. Field of the Invention
This invention relates to logic circuits of the type which sense the level of one or more input signals by referencing said one or more input signals to a threshold level, and in particular to an improved logic circuit which is unaffected by large and abrupt changes in supply voltage.
2. Description of the Prior Art
FIG. 1 illustrates a representative prior art logic circuit 5, which includes input signal generator 6, differential logic circuit 7, and reference voltage generator 8, all having power supplied by supply voltage V.sub.cc. It is to be noted that the present invention can be applied to a variety of logic circuits whether they be analog or digital, or whether or not the logic circuit requires a reference voltage to establish a threshold voltage for determining a high or low state of a signal. What is important, however, is that the logic circuit have a 25 threshold voltage related to a certain voltage level, such as a power supply voltage level, and the level of an input signal to be referenced to the threshold voltage is also 28 related to the certain voltage level.
In FIG. 1, input signal generator 6 generates an input voltage V.sub.in which is to be compared to a reference voltage V.sub.ref, generated by reference voltage generator 8, to determine whether V.sub.in represents a high or low state. If V.sub.in is greater than V.sub.ref, V.sub.ref being approximately equal to [V.sub.in (high)+V.sub.in (low)]/2, differential logic circuit 7 generates an output signal V.sub.out which will be at, for example, a high state. The design of input signal generator 6 and reference voltage generator 8 is such that the two circuits will respond similarly to changes in ambient temperature and low frequency variations in supply voltage V.sub.cc. The output V.sub.out of differential logic circuit 7 is not affected by the amplitudes of V.sub.in and V.sub.ref increasing or decreasing together due to these temperature and supply voltage variations, since it is the difference between the two signals that is measured. Differential logic circuit 7 also isolates the more sensitive input signal generator 6 from output circuits coupled to V.sub.out.
If supply voltage V.sub.cc were to undergo an abrupt change, such as a voltage spike, the amplitudes of V.sub.in and V.sub.ref may not correspond identically since the frequency responses and amplitude versus time responses of input signal generator 6 and reference voltage generator 8, as determined by the time constants of each circuit, may not be identical.
Generally, for lower frequency perturbations in supply voltage V.sub.cc, the time constants of both circuits are so small in comparison to the rate of change of V.sub.cc that they have negligible effect on the responses of these circuits to these V.sub.cc perturbations. Thus, the circuits will respond similarly without causing an erroneous output voltage V.sub.out to be generated. However, for very abrupt changes in supply voltage V.sub.cc, such as when an inductive output load is switched on or off and generates a di/dt related voltage spike on the power supply line, the difference in time constants of the two circuits may be large enough for V.sub.in and V.sub.ref to vary in amplitude at significantly different rates and possibly cause an erroneous output voltage V.sub.out to result.
FIG. 2 illustrates a case wherein one power supply is used to power both an output circuit, controlled by V.sub.out, and logic circuit 5 of FIG. 1. Steady state amplitudes of supply voltage V.sub.cc, input voltage V.sub.in, reference voltage V.sub.ref, and output voltage V.sub.out are shown from time T0 to T1. As seen, V.sub.in is below V.sub.ref, which, in this case, causes V.sub.out to be at a low state. At T1, a voltage spike on the power line causes V.sub.cc to rise rapidly. This abrupt increase in supply voltage V.sub.cc causes a slightly delayed but sudden increase in V.sub.in, this increase being determined by the time constants of input signal generator 6, and causes a slower increase in V.sub.ref, due to reference voltage generator 8 having larger time constants. At T2, V.sub.in rises above V.sub.ref, causing V.sub.out to go high and to thus send an erroneous output voltage to the output circuit. At T3, V.sub.in falls below V.sub.ref, due to V.sub.ref still rising and V.sub.in starting to fall, and V.sub.out is switched to a low state. At T4, proper operation of the logic circuit resumes. To avoid these erroneous output voltages, prior art logic circuits typically employ two independent power supplies: one to power the sensitive logic circuits, and the other to power the output buffer circuits and output loads. The additional power supply increases the cost and space requirements to support the logic circuit and adds complexity to the integrated circuit containing the logic circuit due to at least two power supply pins being required. Prior art logic circuits which employ one power supply must have the permissible voltage deviations between the threshold voltage level and input signals increased to accommodate these differing responses to voltage spikes, causing a concomitant lowering in switching speed.